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<div class="header">
  <div class="headertitle"><div class="title">TIM_HandleTypeDef Struct Reference<div class="ingroups"><a class="el" href="group___s_t_m32_h7xx___h_a_l___driver.html">STM32H7xx_HAL_Driver</a> &raquo; <a class="el" href="group___t_i_m.html">TIM</a> &raquo; <a class="el" href="group___t_i_m___exported___types.html">TIM Exported Types</a></div></div></div>
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<p>TIM Time Base Handle Structure definition.  
 <a href="#details">More...</a></p>

<p><code>#include &lt;<a class="el" href="stm32h7xx__hal__tim_8h_source.html">stm32h7xx_hal_tim.h</a>&gt;</code></p>
<table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 id="header-pub-attribs" class="groupheader"><a id="pub-attribs" name="pub-attribs"></a>
Public Attributes</h2></td></tr>
<tr class="memitem:ad0c5f736a15f6d8d14724854c8133bcc" id="r_ad0c5f736a15f6d8d14724854c8133bcc"><td class="memItemLeft" align="right" valign="top"><a class="el" href="struct_t_i_m___type_def.html">TIM_TypeDef</a> *&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="#ad0c5f736a15f6d8d14724854c8133bcc">Instance</a></td></tr>
<tr class="memitem:a8b2e61c3c4128e62cb7be7d35048152e" id="r_a8b2e61c3c4128e62cb7be7d35048152e"><td class="memItemLeft" align="right" valign="top"><a class="el" href="struct_t_i_m___base___init_type_def.html">TIM_Base_InitTypeDef</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="#a8b2e61c3c4128e62cb7be7d35048152e">Init</a></td></tr>
<tr class="memitem:ae9c5a11c1f5b27c808c0aca453e63870" id="r_ae9c5a11c1f5b27c808c0aca453e63870"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group___t_i_m___exported___types.html#gaa3fa7bcbb4707f1151ccfc90a8cf9706">HAL_TIM_ActiveChannel</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="#ae9c5a11c1f5b27c808c0aca453e63870">Channel</a></td></tr>
<tr class="memitem:a15338c71de82fa178c685be868e694bd" id="r_a15338c71de82fa178c685be868e694bd"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group___d_m_a___exported___types.html#ga41b754a906b86bce54dc79938970138b">DMA_HandleTypeDef</a> *&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="#a15338c71de82fa178c685be868e694bd">hdma</a> [7]</td></tr>
<tr class="memitem:a2a24b963b57150ed2fb0f051cd87b65a" id="r_a2a24b963b57150ed2fb0f051cd87b65a"><td class="memItemLeft" align="right" valign="top"><a class="el" href="stm32h7xx__hal__def_8h.html#ab367482e943333a1299294eadaad284b">HAL_LockTypeDef</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="#a2a24b963b57150ed2fb0f051cd87b65a">Lock</a></td></tr>
<tr class="memitem:a6b6eeaf94f2e6e3d0a5bdac44adf21d6" id="r_a6b6eeaf94f2e6e3d0a5bdac44adf21d6"><td class="memItemLeft" align="right" valign="top"><a class="el" href="core__armv81mml_8h.html#aec43007d9998a0a0e01faede4133d6be">__IO</a> <a class="el" href="group___t_i_m___exported___types.html#gae0994cf5970e56ca4903e9151f40010c">HAL_TIM_StateTypeDef</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="#a6b6eeaf94f2e6e3d0a5bdac44adf21d6">State</a></td></tr>
<tr class="memitem:a97dfe939e85a354c2dd8c66bef48e5a2" id="r_a97dfe939e85a354c2dd8c66bef48e5a2"><td class="memItemLeft" align="right" valign="top"><a class="el" href="core__armv81mml_8h.html#aec43007d9998a0a0e01faede4133d6be">__IO</a> <a class="el" href="group___t_i_m___exported___types.html#ga1a70fcbe9952e18af5c890e216a15f34">HAL_TIM_ChannelStateTypeDef</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="#a97dfe939e85a354c2dd8c66bef48e5a2">ChannelState</a> [6]</td></tr>
<tr class="memitem:ac7648b2c1fd8d3fb38913fbad5379b11" id="r_ac7648b2c1fd8d3fb38913fbad5379b11"><td class="memItemLeft" align="right" valign="top"><a class="el" href="core__armv81mml_8h.html#aec43007d9998a0a0e01faede4133d6be">__IO</a> <a class="el" href="group___t_i_m___exported___types.html#ga1a70fcbe9952e18af5c890e216a15f34">HAL_TIM_ChannelStateTypeDef</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="#ac7648b2c1fd8d3fb38913fbad5379b11">ChannelNState</a> [4]</td></tr>
<tr class="memitem:a985e3a4b24617ab917ed20e089e4ce83" id="r_a985e3a4b24617ab917ed20e089e4ce83"><td class="memItemLeft" align="right" valign="top"><a class="el" href="core__armv81mml_8h.html#aec43007d9998a0a0e01faede4133d6be">__IO</a> <a class="el" href="group___t_i_m___exported___types.html#ga9b87df539778a60ea940a9d5ba793f7c">HAL_TIM_DMABurstStateTypeDef</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="#a985e3a4b24617ab917ed20e089e4ce83">DMABurstState</a></td></tr>
</table>
<a name="details" id="details"></a><h2 id="header-details" class="groupheader">Detailed Description</h2>
<div class="textblock"><p>TIM Time Base Handle Structure definition. </p>
</div><a name="doc-variable-members" id="doc-variable-members"></a><h2 id="header-doc-variable-members" class="groupheader">Member Data Documentation</h2>
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<h2 class="memtitle"><span class="permalink"><a href="#ae9c5a11c1f5b27c808c0aca453e63870">&#9670;&#160;</a></span>Channel</h2>

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          <td class="memname"><a class="el" href="group___t_i_m___exported___types.html#gaa3fa7bcbb4707f1151ccfc90a8cf9706">HAL_TIM_ActiveChannel</a> TIM_HandleTypeDef::Channel</td>
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<p>Active channel </p>

</div>
</div>
<a id="ac7648b2c1fd8d3fb38913fbad5379b11" name="ac7648b2c1fd8d3fb38913fbad5379b11"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ac7648b2c1fd8d3fb38913fbad5379b11">&#9670;&#160;</a></span>ChannelNState</h2>

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          <td class="memname"><a class="el" href="core__armv81mml_8h.html#aec43007d9998a0a0e01faede4133d6be">__IO</a> <a class="el" href="group___t_i_m___exported___types.html#ga1a70fcbe9952e18af5c890e216a15f34">HAL_TIM_ChannelStateTypeDef</a> TIM_HandleTypeDef::ChannelNState[4]</td>
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<p>TIM complementary channel operation state </p>

</div>
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<a id="a97dfe939e85a354c2dd8c66bef48e5a2" name="a97dfe939e85a354c2dd8c66bef48e5a2"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a97dfe939e85a354c2dd8c66bef48e5a2">&#9670;&#160;</a></span>ChannelState</h2>

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          <td class="memname"><a class="el" href="core__armv81mml_8h.html#aec43007d9998a0a0e01faede4133d6be">__IO</a> <a class="el" href="group___t_i_m___exported___types.html#ga1a70fcbe9952e18af5c890e216a15f34">HAL_TIM_ChannelStateTypeDef</a> TIM_HandleTypeDef::ChannelState[6]</td>
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<p>TIM channel operation state </p>

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<a id="a985e3a4b24617ab917ed20e089e4ce83" name="a985e3a4b24617ab917ed20e089e4ce83"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a985e3a4b24617ab917ed20e089e4ce83">&#9670;&#160;</a></span>DMABurstState</h2>

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          <td class="memname"><a class="el" href="core__armv81mml_8h.html#aec43007d9998a0a0e01faede4133d6be">__IO</a> <a class="el" href="group___t_i_m___exported___types.html#ga9b87df539778a60ea940a9d5ba793f7c">HAL_TIM_DMABurstStateTypeDef</a> TIM_HandleTypeDef::DMABurstState</td>
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<p>DMA burst operation state </p>

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<a id="a15338c71de82fa178c685be868e694bd" name="a15338c71de82fa178c685be868e694bd"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a15338c71de82fa178c685be868e694bd">&#9670;&#160;</a></span>hdma</h2>

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          <td class="memname"><a class="el" href="group___d_m_a___exported___types.html#ga41b754a906b86bce54dc79938970138b">DMA_HandleTypeDef</a>* TIM_HandleTypeDef::hdma[7]</td>
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<p>DMA Handlers array This array is accessed by a <a class="el" href="group___d_m_a___handle__index.html">TIM DMA Handle Index</a> </p>

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<a id="a8b2e61c3c4128e62cb7be7d35048152e" name="a8b2e61c3c4128e62cb7be7d35048152e"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a8b2e61c3c4128e62cb7be7d35048152e">&#9670;&#160;</a></span>Init</h2>

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          <td class="memname"><a class="el" href="struct_t_i_m___base___init_type_def.html">TIM_Base_InitTypeDef</a> TIM_HandleTypeDef::Init</td>
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<p>TIM Time Base required parameters </p>

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<a id="ad0c5f736a15f6d8d14724854c8133bcc" name="ad0c5f736a15f6d8d14724854c8133bcc"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ad0c5f736a15f6d8d14724854c8133bcc">&#9670;&#160;</a></span>Instance</h2>

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          <td class="memname"><a class="el" href="struct_t_i_m___type_def.html">TIM_TypeDef</a>* TIM_HandleTypeDef::Instance</td>
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<p>Register base address </p>

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<a id="a2a24b963b57150ed2fb0f051cd87b65a" name="a2a24b963b57150ed2fb0f051cd87b65a"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a2a24b963b57150ed2fb0f051cd87b65a">&#9670;&#160;</a></span>Lock</h2>

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          <td class="memname"><a class="el" href="stm32h7xx__hal__def_8h.html#ab367482e943333a1299294eadaad284b">HAL_LockTypeDef</a> TIM_HandleTypeDef::Lock</td>
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<p>Locking object </p>

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<a id="a6b6eeaf94f2e6e3d0a5bdac44adf21d6" name="a6b6eeaf94f2e6e3d0a5bdac44adf21d6"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a6b6eeaf94f2e6e3d0a5bdac44adf21d6">&#9670;&#160;</a></span>State</h2>

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          <td class="memname"><a class="el" href="core__armv81mml_8h.html#aec43007d9998a0a0e01faede4133d6be">__IO</a> <a class="el" href="group___t_i_m___exported___types.html#gae0994cf5970e56ca4903e9151f40010c">HAL_TIM_StateTypeDef</a> TIM_HandleTypeDef::State</td>
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<p>TIM operation state </p>

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<hr/>The documentation for this struct was generated from the following file:<ul>
<li>C:/Users/ASUS/Desktop/dm-ctrlH7-balance-9025test/Drivers/STM32H7xx_HAL_Driver/Inc/<a class="el" href="stm32h7xx__hal__tim_8h_source.html">stm32h7xx_hal_tim.h</a></li>
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